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HSDL-3208
Ultra Small Profile Package IrDA(R) Data Compliant Low Power 115.2 kbit/s Infrared Transceiver
Data Sheet
Description
The HSDL-3208 is an ultra-small low cost infrared transceiver module that provides the interface between logic and infrared (IR) signals for through air, serial, half-duplex IR data link. The module is compliant to IrDA Physical Layer Specifications version 1.4 Low Power from 9.6 kbit/s to 115.2 kbit/s with extended link distance. It is IEC 825-Class 1 eye safe and able to switch to Low Tx Power Mode when programming sequence is applied to both SD and TXD inputs. The HSDL-3208 can be shut down completely to achieve very low power consumption. In the shutdown mode, the PIN diode will be inactive and thus producing very little photocurrent even under very bright ambient light. Such features are ideal for battery operated handheld products.
Features
* Fully compliant to IrDA 1.4 low power specification from 9.6 kbit/s to 115.2 kbit/s * Miniature package - Height: 1.60 mm - Width: 7.00 mm - Depth: 2.80 mm * Miniature package (with shield) - Height: 1.80 mm - Width: 7.40 mm - Depth: 2.90 mm * Guaranteed temperature performance, -25 to +70C - Critical parameters are guaranteed over temperature and supply voltage * Low power consumption - Low shutdown current (1 nA typical) - Complete shutdown of TXD, RXD, and PIN diode * Withstands >100 mVp-p power supply ripple typically * Excellent EMI performance without shield * VCC supply 2.4 to 3.6 volts * LED stuck-high protection * Designed to accommodate light loss with cosmetic windows * IEC 825-class 1 eye safe * Lead-free and RoHS compliant
VCC CX2
Applications
VCC (6) CX1 GND (7)
RXD (4)
HSDL-3208
TXD (3) LED C (2) VCC
R1 TRANSMITTER
LED A (1)
RECEIVER
SD (5)
* IRFM * Mobile telecom - Cellular phones - Pagers - Smart phones * Data communication - PDAs - Portable printers * Digital imaging - Digital cameras - Photo-imaging printers
7
6
5
4
3
2
1
Figure 1. Functional block diagram of HSDL-3208.
Figure 2. Rear view diagram with pinout.
Application Support Information
The Application Engineering group in Lite-On Technology is available to assist you with the Order Information Part Number HSDL-3208-021 Packaging Type Tape and Reel
technical understanding associated with HSDL-3208 infrared transceiver module. You can contact them through your local Lite-On sales representatives for additional details.
Package Front View
Quantity 2500
Marking Information
The unit is marked with `YWL' on the back of the PCB for front option without shield. Y = year W = work week L = lot information
I/O Pins Configuration Table
Pin 1 2 3 4 5 6 7 Symbol LED A LED C TXD RXD SD/Mode VCC GND Description LED Anode LED Cathode Transmit Data Receive Data Shutdown Supply Voltage Ground Input, Active High Output, Active Low Input, Active High Supply Voltage Ground I/O Type Input Notes 1 2 3 4 5 6 7
Notes: 1. This pin can be connected directly to VCC (i.e. without series resistor) at less than 3 V. 2. Leave this pin unconnected. 3. This pin is used to transmit serial data when SD pin is low. Do not float the pin. This pin has an internal 500 k pulldown with a typical input capacitance of 2 pF. 4. This pin is capable of driving a standard CMOS or TTL load. No external pull-up or pull down resistor is required. It is in tri-state mode when the transceiver is in shutdown mode. This pin tristates with a weak 500 k pullup resistor. 5. The transceiver is in shutdown mode if this pin is high. Do not float the pin. 6. Regulated, 2.4 to 3.6 volts. 7. Connect to system ground.
Recommended Application Circuit Components
Component R1 CX1 CX2 Recommended Value 30 5%, 0.25 Watt for 2.4 <= VCC <= 3.6 V 0.47 F 20%, X7R Ceramic 6.8 F 20%, Tantalum 8 9 Notes
Notes: 8. CX1 must be placed within 0.7 cm of the HSDL-3208 to obtain optimum noise immunity. 9. In environments with noisy power supplies, supply rejection performance can be enhanced by including CX2, as shown in "Figure 1: HSDL-3208 Functional Block Diagram" in Page 1.
2
TX Power Mode Switching
The transceiver is in default High TX Power Mode upon powered on. User needs to apply the following programming sequence to both SD and TXD inputs to switch the module to Low TX Power Mode. Both settings of High TX Power and Low TX Power Mode can be achieved as follows:
VIH SD/MODE 50% VIL tS tH tS tH SD/MODE 50%
VIH
VIL
VIH TXD 50% 50% VIL TXD 50% 50% VIL
Figure 3. High power mode selection timing diagram.
Figure 4. Low power mode selection timing diagram.
1. Set SD/Mode input to logic High. 2. TXD input should remain at logic Low. 3. After waiting for ts 25 ns, set SD/Mode to logic Low. The High to Low negative edge transition will determine the TX Power Mode. 4. Ensure that TXD input remains low for tH 100 ns. The transmitter is now in High mode. 5. SD input pulse width for mode selection should be > 50 ns.
1. Set SD/Mode input to logic High. 2. After SD/Mode input remains High at > 25 ns, set TXD input to logic High, wait ts 25 ns (from 50% of TXD rising edge until 50% of SD falling edge). 3. Then set SD/Mode to logic Low. The High to Low negative edge transition will determine the TX Power Mode. 4. After waiting for tH 100 ns, set the TXD input to logic Low. 5. SD input pulse width for mode selection should be > 50 ns.
3
CAUTIONS: The BiCMOS inherent to the design of this component increases the component's susceptibility to damage from the electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
Absolute Maximum Ratings
For implementations where case to ambient thermal resistance is _50C/W. Parameter Storage Temperature Operating Temperature LED Anode Voltage Supply Voltage Input Voltage: TXD, SD/Mode Output Voltage: RXD DC LED Transmit Current Peak LED Transmit Current
Note: 10. 20% duty cycle, 90 s pulse width.
Symbol TS TA VLEDA VCC VI VO ILED (DC) ILED (PK)
Min. -40 -25 0 0 0 0
Max. +100 +85 6.5 6.5 6.5 6.5 50 250
Units C C V V V V mA mA
Notes
10
Recommended Operating Conditions
Parameter Operating Temperature Supply Voltage Logic Input Voltage Logic High for TXD, SD/Mode Logic Low Receiver Input Irradiance Logic High Logic Low Symbol TA VCC VIH VIL EIH EIL ILEDA 9.6 50 115.2 Min. -25 2.4 2/3 VCC 0 0.0081 Typ. Max. 70 3.6 VCC 1/3 VCC 500 1 Units C V V V mW/cm2 W/cm2 mA kbit/s For in-band signals 115.2kbit/s[11] For in-band signals[11] Conditions
LED (Logic High) Current Pulse Amplitude Receiver Data Rate
Note: 11. An in-band optical signal is a pulse/sequence where the peak wavelength, p, is defined as 850 p 900 nm, and the pulse characteristics are compliant with the IrDA Serial Infrared Physical Layer Link Specification v1.4.
4
Electrical & Optical Specifications
Specifications (Min. & Max. values) hold over the recommended operating conditions unless otherwise noted. Unspecified test conditions may be anywhere in their operating range. All typical values (Typ.) are at 25C with VCC set to 3.0 V unless otherwise noted. Parameter Receiver Viewing Angle Peak Sensitivity Wavelength RXD Output Voltage Logic High Logic Low 2 p VOH VOL VCC-0.2 0 30 880 VCC 0.4 4.0 50 70 90 nm V V s ns s s ILEDA = 50 mA, 15, VTXD VIH T = 25C ILEDA = 30 mA, 15, VTXD VIH T = 70C, VCC = 2.4 V IOH = -200 A, EI 1 W/cm2 IOL = 200 A, EI 8.1 W/cm2 15, CL =12 pF CL =12 pF Symbol Min. Typ. Max. Units Conditions
RXD Pulse Width (SIR) RXD Rise and Fall Times Receiver Latency Time Receiver Wake Up Time Transmitter Radiant Intensity
tPW (SIR) 1 tr, tf tL tW
High Power IEH Low Power IEH
4 2.4 30
8 4.8 60 875 35 0.02 10 10
mW/sr mW/sr nm nm A A mA 100 1.8 s 600 ns V V mA nA s
Viewing Angle Peak Wavelength Spectral Line Half Width TXD Input Current High Low LED Current On Shutdown Optical Pulse Width (SIR) Maximum Optical PW tPW(max.) TXD Rise and Fall Time (Optical) LED Anode on State Voltage
2 p IH IL IVLED IVLED
VI VIH 0 VI _ VIL VI (TXD) VIH, VI (SD) VIL VI (SD) VIH tPW (TXD) = 1.6 s at 115.2 kbit/s tpw (TXD) = 1.6 s ILEDA = 50 mA, VI(TXD) VIH ILEDA = 30 mA, VI(TXD) VIH T = 70C, VCC = 2.4 V max. current measured at VLED = 4.3 V and R = 33 VSD VCC -0.5, TA = 25C VI (TXD) VIL, EI = 0 VCC = 3.6 V, VI(TXD) 1/3 VCC[12]
-10
-0.02 50 20 1.6 100
tPW (SIR) 1.5 25 tr, tf
High Power VON(LEDA) Low Power VON(LEDA)
1.7 2.1 32
1.8 2.25 42
LED Anode Current Transceiver Supply Current
Low Power ILEDA
Shutdown Idle Active Receiver
ICC1 ICC2 ICC3
0.001 1 100 0.8 200 3.1
A A mA
Notes: 12. Typical value is at EI = 10 mW/cm2, maximum value is at EI = 500 mW/cm2.
5
tpw
tpw VOH
LED ON
90% 50% 10%
LED OFF
90% 50% 10%
VOL
tf
tr
tr
tf
Figure 5. RXD output waveform.
Figure 6. LED optical waveform.
TXD
SD
RX LIGHT
LED
RXD
tpw (MAX.)
tRW
Figure 7. TXD "stuck on" protection waveform.
Figure 8. Receiver wakeup time waveform.
SD
TXD
TX LIGHT tTW
Figure 9. TXD wakeup time waveform.
AVE. TXD RADIANT INTENSITY vs. AVE. TXD ILED_A, TEMPERATURE = 25C 21
AVE. RADIANT INTENSITY (mW/Sr)
AVE. TXD ILED_A vs. AVE. TXD VLED_A, TEMPERATURE = 25C 100.0E-3 90.0E-3
19 17 15 13 11 9 7 45.0E-3 65.0E-3 85.0E-3 105.0E-3
AVE. TXD ILED_A (A)
AVE. TXD ILED_A (A)
80.0E-3 70.0E-3 60.0E-3 50.0E-3 40.0E-3 1.44 1.46 1.48 1.50 1.52 1.54 1.56 1.58 1.60 AVE. TXD VLED_A (V)
Figure 10. LOP vs. ILED.
Figure 11. VLED vs. ILED.
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HSDL-3208 (Unshielded) Package Dimensions
0.80 2.80
3.50
MOUNTING CENTER
7.00 0.10
1.60 0.10 0.80
;;;
R 1.10 R 1.10 2.80
LED A LED C TXD RXD SD
0.95
5.10
0.95
1.60 0.80
VCC GND
0.95 (6X)
0.60 (7X)
0.34 (5X)
0.40 (2X)
Figure 12. Package outline dimensions. (Unit: mm, Tolerance: 0.2 mm)
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HSDL-3208 (Unshielded) Tape and Reel Dimensions
UNIT: mm
4.0 0.1 + 0.1 1.5 0 1.75 0.1 2.0 0.1
POLARITY PIN 7: GND 7.35 0.1 PIN 1: LED A 2.93 0.1 0.3 0.05 1.78 0.1 PROGRESSIVE DIRECTION 4.0 0.1 7.5 0.1 16.0 0.2
EMPTY (40 mm MIN.)
PARTS MOUNTED
LEADER (400 mm MIN.) EMPTY (40 mm MIN.)
OPTION # "B" "C" QUANTITY 021 UNIT: mm 178 60 2500
DETAIL A 2.0 0.5 13.0 0.5 B C
R 1.0 LABEL 21 0.8 DETAIL A 2 16.4 + 0 2.0 0.5
Figure 13. Tape and reel dimensions.
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HSDL-3208 (Shielded) Package Dimensions
1. Unless otherwise stated, dimension tolerance: 0.2 mm. 2. Castellation length, mentioned below, is the minimum value i.e., 0.6 mm. The specification is: 0.63 0.03 mm.
3.7 MOUNTING CENTER 0.99
7.40 0.10 7.00 -0.00
+0.03
1.80 0.05 0.8 2.5 0.95 2.0 5.1 0.95 COPLANARITY = -0.1 mm to 0.0 mm EMITTER 0.95 2.9 0.6 1.6 1 2 3 4 6.96 5 6 7 1.97 R1.1 RECEIVER
0.2
0.64 0.15 -0.01
+0.02
0.95
0.6
0.63 0.03
Figure 14a. Package outline dimensions.
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HSDL-3208 (Shielded) Tape Dimensions
2.0 0.10 Po P2 Do B E T
5(MAX.) F W Bo
A
A 8 0.10 Ao 3(MAX.)
P1 D1
B Ko
A-A SECTION
UNIT: mm SYMBOL SPEC SYMBOL SPEC Ao 3.15 0.10 E 1.75 0.10 Bo 7.70 0.10 F 7.50 0.10 Ko 1.95 0.10 Do 1.55 0.05 Po 4.00 0.10 D1 1.50 0.10 P1 8.00 0.10 W 16.00 0.30 P2 2.35 0.10 10Po 40.00 0.20 T 0.30 0.10
+0.5 16 -0 +0.5 n 13.1 -0
62.3
+0.1 -0.1 +0.1 2.6 -0.1
PS
Figure 15. Tape dimensions.
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B-B SECTION
Moisture Proof Packaging
All HSDL-3208 options are shipped in moisture proof package. Once opened, moisture absorption begins. This part is compliant to JEDEC Level 4.
Baking Conditions
If the parts are not stored in dry conditions, they must be baked before reflow to prevent damage to the parts. Package In reels In bulk
UNITS IN A SEALED MOISTURE-PROOF PACKAGE
Temp. 60C 100C 125C 150C
Time 48 hours 4 hours 2 hours 1 hour
Baking should only be done once.
PACKAGE IS OPENED (UNSEALED)
Recommended Storage Conditions
Storage Temperature Relative Humidity 10C to 30C below 60% RH
ENVIRONMENT LESS THAN 30C, AND LESS THAN 60% RH
YES
Time from Unsealing to Soldering
After removal from the bag, the parts should be soldered within three days if stored at the recommended storage conditions.
NO BAKING IS NECESSARY
YES
PACKAGE IS OPENED LESS THAN 72 HOURS
NO
PERFORM RECOMMENDED BAKING CONDITIONS
NO
Figure 16. Baking conditions chart.
11
Recommended Reflow Profile
255
T - TEMPERATURE - (C)
MAX. 260C
R3 R4
230 220 200 180 160 120 80 25 0 P1 HEAT UP 50 100 150 200 P3 SOLDER REFLOW 250 P4 COOL DOWN 300 R1 R2 60 sec. MAX. ABOVE 220C
R5
t-TIME (SECONDS) P2 SOLDER PASTE DRY
Figure 17. Reflow graph.
Process Zone Heat Up Solder Paste Dry Solder Reflow
Symbol P1, R1 P2, R2 P3, R3 P3, R4
T 25C to 160C 160C to 200C 200C to 255C (260C at 10 seconds max.) 255C to 200C 200C to 25C
Maximum T/time 4C/s 0.5C/s 4C/s -6C/s -6C/s
Cool Down
P4, R5
The reflow profile is a straightline representation of a nominal temperature profile for a convective reflow solder process. The temperature profile is divided into four process zones, each with different T/time temperature change rates. The T/time rates are detailed in the above table. The temperatures are measured at the component to printed circuit board connections. In process zone P1, the PC board and HSDL-3208 castellation I/O pins are heated to a temperature of 160C to activate the flux in the solder paste. The temperature ramp up rate, R1, is limited to 4C per second to allow for even heating of both the PC board and HSDL-3208 castellation I/O pins. 12
Process zone P2 should be of sufficient time duration (60 to 120 seconds) to dry the solder paste. The temperature is raised to a level just below the liquidus point of the solder, usually 200C (392F). Process zone P3 is the solder reflow zone. In zone P3, the temperature is quickly raised above the liquidus point of solder to 255C (491F) for optimum results. The dwell time above the liquidus point of solder should be between 20 and 60 seconds. It usually takes about 20 seconds to assure proper coalescing of the solder balls into liquid solder and the formation of good solder connections. Beyond a dwell time of 60 seconds, the intermetallic growth within the solder
connections becomes excessive, resulting in the formation of weak and unreliable connections. The temperature is then rapidly reduced to a point below the solidus temperature of the solder, usually 200C (392F), to allow the solder within the connections to freeze solid. Process zone P4 is the cool down after solder freeze. The cool down rate, R5, from the liquidus point of the solder to 25C (77F) should not exceed 6C per second maximum. This limitation is necessary to allow the PC board and HSDL-3208 castellation I/O pins to change dimensions evenly, putting minimal stresses on the HSDL3208 transceiver.
HSDL-3208 (Unshielded)
1.0 Solder Pad, Mask and Metal Stencil Aperture
STENCIL APERTURE
METAL STENCIL FOR SOLDER PASTE PRINTING
LAND PATTERN
SOLDER MASK PCBA
Figure 18. Stencil and PCBA.
1.1 Recommended Land Pattern
C L MOUNTING CENTER 0.10
0.775 1.75
FIDUCIAL 0.60 0.95 1.9 UNIT: mm 2.85
Figure 19. Stencil and PCBA.
13
1.2 Recommended Metal Solder Stencil Aperture It is recommended that only a 0.152 mm (0.006 inches) or a 0.127 mm (0.005 inches) thick stencil be used for solder paste printing. This is to ensure adequate printed solder paste volume and no shorting. See the table below the drawing for combinations of metal stencil aperture and metal stencil thickness that should be used. Aperture opening for shield pad is 2.7 mm x 1.25 mm as per land pattern.
APERTURES AS PER LAND DIMENSIONS
t
w l
Figure 20. Solder stencil aperture.
Aperture size(mm) Stencil thickness, t (mm) 0.152 mm 0.127 mm length, l 2.60 0.05 3.00 0.05 width, w 0.55 0.05 0.55 0.05
1.3 Adjacent Land Keepout and Solder Mask Areas Adjacent land keep-out is the maximum space occupied by the unit relative to the land pattern. There should be no other SMD components within this area. The minimum solder resist strip width required to avoid solder bridging adjacent pads is 0.2 mm. It is recommended that two fiducial crosses be placed at mid-length of the pads for unit alignment. Note: Wet/Liquid PhotoImageable solder resist/mask is recommended.
7.2
0.2 2.6
SOLDER MASK
3.0
UNITS: mm
Figure 21. Adjacent land keepout and solder mask areas.
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Appendix A : SMT Assembly Application Note HSDL-3208 (Shielded)
2.0 Solder Pad, Mask and Metal Stencil Aperture
STENCIL APERTURE
METAL STENCIL FOR SOLDER PASTE PRINTING
LAND PATTERN
SOLDER MASK PCBA
Figure 22. Stencil and PCBA.
2.1 Recommended Land Pattern
C L SHIELD SOLDER PAD 1.35
1.25 2.05 0.20 MOUNTING CENTER
0.925 1.45
FIDUCIAL 0.60 0.95 1.9 UNIT: mm 2.85
Figure 23. Land Pattern.
15
2.2 Recommended Metal Solder Stencil Aperture It is recommended that only a 0.152 mm (0.006 inches) or a 0.127 mm (0.005 inches) thick stencil be used for solder paste printing. This is to ensure adequate printed solder paste volume and no shorting. See the table below the drawing for combinations of metal stencil aperture and metal stencil thickness that should be used. Aperture opening for shield pad is 2.7 mm x 1.25 mm as per land pattern.
APERTURES AS PER LAND DIMENSIONS t
w l
Figure 24. Solder stencil aperture.
Aperture size(mm) Stencil thickness, t (mm) 0.152 mm 0.127 mm length, l 1.45 0.05 1.45 0.05 width, w 0.55 0.05 0.55 0.05
2.3 Adjacent Land Keepout and Solder Mask Areas Adjacent land keep-out is the maximum space occupied by the unit relative to the land pattern. There should be no other SMD components within this area. The minimum solder resist strip width required to avoid solder bridging adjacent pads is 0.2 mm. It is recommended that two fiducial crosses be placed at mid-length of the pads for unit alignment. Note: Wet/Liquid PhotoImageable solder resist/mask is recommended.
8.2
0.2
2.6
Solder mask Units: mm
3.0
Figure 25. Adjacent land keepout and solder mask areas.
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Appendix B: PCB Layout Suggestion
The HSDL-3208 is a shieldless part and hence does not contain a shield trace, unlike the other transceivers. The following PCB layout guidelines should be followed to obtain a good PSRR and EM immunity, resulting in good electrical performance. Things to note: 1. The AGND pin should be connected to the ground plane. 2. C1 and C2 are optional supply filter capacitors; they may be left out if a clean power supply is used. 3. VLED can be connected to either unfiltered or unregulated power supply. If VLED and VCC share the same power supply and C1 is used, the connection should be before the current limiting resistor R2. In a noisy environment, including capacitor C2 can enhance supply rejection. C1 is generally a ceramic capacitor of low inductance providing a wide frequency response while C2 is a tantalum capacitor of big volume and fast frequency response. The use of a tantalum capacitor is more critical on the VLED line, which carries a high current. 4. Preferably a multi-layered board should be used to provide sufficient ground plane. Use the layer underneath and near the transceiver module as VCC, and sandwich that layer between
ground connected board layers. Refer to the diagram below for an example of a 4-layer board. The area underneath the module at the second layer, and 3 cm in all directions around the module, is defined as the critical ground plane zone. The ground plane should be maximized in this zone. Refer to application note AN1114 or the Lite-On IrDA Data Link Design Guide for details. The layout below is based on a 2-layer PCB.
TOP LAYER CONNECT THE METAL SHIELD AND MODULE GROUND PIN TO BOTTOM GROUND LAYER.
LAYER 2 CRITICAL GROUND PLANE ZONE. DO NOT CONNECT DIRECTLY TO THE MODULE GROUND PIN. LAYER 3 KEEP DATA BUS AWAY FROM CRITICAL GROUND PLANE ZONE.
BOTTOM LAYER (GND)
Top View
Figure 26. PCB layout suggestion.
Bottom View
17
Appendix C : General Application Guide for the HSDL-3208 Infrared IrDA(R) Compliant 115.2 kb/s Transceiver
Description The HSDL-3208 is an ultra-small low-cost infrared transceiver module that provides the interface between logic and infrared (IR) signals for through air, serial, half-duplex IR data link. The device is designed to address the mobile computing market such as PDAs, as well as small embedded mobile products such as digital cameras and cellular phones. It is
fully compliant to IrDA 1.4 low power specification from 9.6 kb/s to 115.2 kb/s, and supports HPSIR and TV Remote modes. The design of the HSDL-3208 also includes the following unique features: * Low passive component count * Shutdown mode for low power consumption requirement
Interface to Recommended I/O Chips The HSDL-3208's TXD data input is buffered to allow for CMOS drive levels. No peaking circuit or capacitor is required.
Data rate from 9.6 kb/s up to 115.2 kb/s is available at the RXD pin. The diagram below shows how the IR port fits into the mobile phone platform and PDA platform.
Selection of Resistor R1 Resistor R1 should be selected to provide the appropriate peak pulse LED current over different ranges of VCC as shown in the table below.
Recommended R1 30 VCC 3.3 V
Intensity 9 mW/Sr
Minimum Peak Pulse LED Current 50 mA
SPEAKER
AUDIO INTERFACE DSP CORE MICROPHONE
ASIC CONTROLLER RF INTERFACE TRANSCEIVER MOD/ DE-MODULATOR MICROCONTROLLER USER INTERFACE IR
HSDL-3208
Figure 27. IR layout in mobile phone platform.
18
LCD PANEL
RAM IR
HSDL-3208 ROM CPU FOR EMBEDDED APPLICATION
PCMCIA CONTROLLER
TOUCH PANEL
RS232C DRIVER
COM PORT
Figure 28. IR layout in PDA platform.
The link distance testing is done using typical HSDL-3208 units with National Semiconductor's PC87109 3V Super I/O Controller and SMC's FDC37C669 and FDC37N769 Super I/O controllers. An 115.2 kb/s datarate IR link distance of up to 40 cm has been demonstrated.
19
Appendix D: Window Designs for HSDL-3208
Optical port dimensions for HSDL-3208: To ensure IrDA compliance, some constraints on the height and width of the window exist. The minimum dimensions ensure that the IrDA cone angles are met without vignetting. The maximum dimensions minimize the effects of stray light. The minimum size corresponds to a cone angle of 30 and the maximum size corresponds to a cone angle of 60. In the figure below, X is the width of the window, Y is the height of the window and Z is the distance from the HSDL-3208 to the back of the window. The distance from the center of the LED lens to the center of the photodiode lens, K, is 5.1 mm. The equations for computing the window dimensions are as follows: X = K + 2*(Z + D)*tanA Y = 2*(Z + D)*tanA The above equations assume that the thickness of the window is negligible compared to the distance of the module from the back of the window (Z). If they are The depth of the LED image inside the HSDL-3208, D, is 3.17 mm. `A' is the required half angle for viewing. For IrDA compliance, the minimum is 150 and the maximum is 300. Assuming the thickness of the window to be negligible, the equations result in the following tables and graphs: comparable, Z' replaces Z in the above equation. Z' is defined as Z' = Z + t/n where `t' is the thickness of the window and `n' is the refractive index of the window material.
;;;;;;;; ;;;;;; ;;;;;;;;; ;;;;;; ;;;;;;;; ;;;;; ;; ;;
OPAQUE MATERIAL IR TRANSPARENT WINDOW Y X IR TRANSPARENT WINDOW K Z A D
OPAQUE MATERIAL
Figure 29. Window design diagram.
20
Module Depth (z) mm 0 1 2 3 4 5 6 7 8 9
Aperture Width (x, mm) Max. Min. 8.76 6.80 9.92 7.33 11.07 7.87 12.22 8.41 13.38 8.94 14.53 9.48 15.69 10.01 16.84 10.55 18.00 11.09 19.15 11.62
Aperture Height (y, mm) Max. Min. 3.66 1.70 4.82 2.33 5.97 2.77 7.12 3.31 8.28 3.84 9.43 4.38 10.59 4.91 11.74 5.45 12.90 5.99 14.05 6.52
APERTURE WIDTH (X) vs. MODULE DEPTH 25
APERTURE HEIGHT (Y) vs. MODULE DEPTH 16
20
APERTURE HEIGHT (Y) - mm
APERTURE WIDTH (X) - mm
14 12 10 8 6 4 2 0 0 1 2 3 4 5 6 Y MAX. Y MIN. 7 8 9
15
10 X MAX. X MIN.
5 0
0
1
2
3
4
5
6
7
8
9
MODULE DEPTH (Z) - mm
MODULE DEPTH (Z) - mm
Figure 30. Aperture width (X) vs. module depth.
Figure 31. Aperture height (Y) vs. module depth.
21
Window Material Almost any plastic material will work as a window material. Polycarbonate is recommended. The surface finish of the plastic should be smooth, without any texture. An IR filter dye may be used in the window to make it look black to the eye, but the total optical loss of the window should be 10% or less for best optical performance. Light loss should be measured at 875 nm. The recommended plastic materials for use as a cosmetic window are available from General Electric Plastics. Recommended Plastic Materials: Material Number Lexan 141L Lexan 920A Lexan 940A Light Transmission 88% 85% 85% Haze 1% 1% 1%
Shape of the Window From an optics standpoint, the window should be flat. This ensures that the window will not alter either the radiation pattern of the LED, or the receive pattern of the photodiode. If the window must be curved for mechanical or industrial design reasons, place the same curve on the back side of the window that has an identical radius as the front side. While this will not completely eliminate the lens effect of the front curved surface, it will significantly reduce the effects. The amount of change in the
radiation pattern is dependent upon the material chosen for the window, the radius of the front and back curves, and the distance from the back surface to the transceiver. Once these items are known, a lens design can be made which will eliminate the effect of the front surface curve. The following drawings show the effects of a curved window on the radiation pattern. In all cases, the center thickness of the window is 1.5 mm, the window is made of polycarbonate plastic, and the distance from the transceiver to the back surface of the window is 3 mm.
Refractive Index 1.586 1.586 1.586
Note: 920A and 940A are more flame retardant than 141L. Recommended Dye: Violet #21051 (IR transmissant above 625 nm).
Flat Window (First Choice)
Figure 32. Shape of windows.
Curved Front and Back (Second Choice)
Curved Front, Flat Back (Do Not Use)
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